Semiconductor chips are typically connected to a printed circuit board or similar structure that in turn interconnects the chips into the rest of circuitry of the computer with which the chip will operate, including other chips on the printed circuit board. In the past the chips were spread out across the printed circuit board on their large flat sides in a simple two-dimensional array. Over the years the trend in the computer industry has been towards more densely packed configurations of chips on a printed circuit boards. Among the causes for this are the increasing demand for larger random access computer memories, demand for faster computers, demand for more compact computers and a push to decrease costs of printed circuit boards by increasing the circuit density on the printed circuit board. In the mid to late 1980's the industry switched over from a technology that attached computer chips to a printed circuit board through holes in the printed circuit board to one that uses various surface mount technologies. With the advent of surface mounting technology, conventional through-holes on printed circuit boards have been replaced with conductive mounting pads mounted on the surface of the printed circuit board. The chips are connected to the board by leads in various configurations such as DIP, etc. This allows for multiple layered circuit boards with a complex network of interconnect lines running between the layers of the circuit board. In turn this allowed for the increase in the density of chips on a printed circuit board that not only decreases the size of the board but also increases the operating speed of the computer by reducing the distance signals have to travel between chips on the board.
The move to surface mount technology resulted in the practice of positioning the chips on the printed circuit board in a variety of configurations to increase chip density on the circuit board and thereby decrease the distance between the chips to speed up operation of the overall system. Layering or positioning the chips on one another to form a three dimensional array is one of the means used to increase chip density on the printed circuit board. The practice of positioning or layering the chips on one another to form a three dimensional array is particularly adaptable to memory chips given the redundancies in their circuits. An example of a significant advance in the stacking of semiconductor chips on a printed circuit board is described in U.S. Pat. No. 6,313,998, which is incorporated by reference herein, it being owned by the same entity as the instant application. U.S. Pat. No. 6,313,998 discloses a carrier with leads and a unique way of positioning one chip over another.
However, as is so typical of the computer industry the technology rushes on and the general trend in the industry is now moving to the use of ball grid array (BGA) type of connections for most semiconductor chip packages. A typical BGA arrangement consists of a set of BGA pads on the bottom of the chip package and a corresponding mirror image array on the printed circuit board. The chip package is then connected to the circuit board by solder balls. BGA types of connectors provide a number advantages among them is elimination of the leads to connect the chip package to the board. Use of a BGA connector decreases the distance the signal has to travel and also eliminate impedance and other interference that can be generated by the leads. There are other advantages well known to those skilled in the art.
However, BGA types of connectors have their own problems among them being an inability to test the BGA connected device while it is connected into the circuitry of a board or other device. IC packages that are connected by leads on the other hand are very easy to test while the device is still connected into the circuit since the long leads can readily have test probes attached to them. On the other hand BGA connected devices by the very nature of the connection are impossible to directly or even indirectly test while they are connected into the circuit. A BGA packaged chip by its very nature is connected by blind pads, i.e. non-exposed pads that can not be accessed. Another problem with BGA type of connectors is the need to develop new techniques that will allow for stacking chips since many if not most of the techniques used to stack chips are for integrated circuit packages that use leads and cannot be readily adapt to BGA type of connectors. Additionally, most of the existing chip stacking devices and methods used to form chips into a three dimensional array tend to be very complicated. They typically cannot work with standard IC packages, be they the lead type or BGA type and generally require the modification of the chip package itself for implementation. Additionally, many if not most of the existing stacking methodologies require special manufacturing steps and/or machines in order to integrate them into standard circuit board assembly and similar processes.
The industry continues to develop new packing techniques to reduce size and enhance signal quality. Among the more recent developments are chip scale packages (CSP). Flip chips are a variation of this type of packaging. Like BGA connections flip chip or CSP packaging relies on blind pads that are not exposed.
Thus, what is needed is a technique and apparatus that will allow for the stacking of semiconductor chip packages on a circuit board that can be used with packages connected by BGA's, CSP, or other type of technology. Such a technique and related devices have to be capable of accepting and connecting in a stacked, three dimensional array on the circuit board without the need for modification of standard semiconductor chip packages that would be used with the apparatus and method. Additionally, such a technique and apparatus should be able to allow for the testing of the various chips and related items without the need for removing the chip or item to be tested from its connection into the circuitry of the overall system.